What is component exchange with delegation?

I am wondering if Component Exchange with Delegation can help me simplify a diagram at the Logical Analysis Stage (I describe my problem below).

As for Delegation, I looked in help and also in the forum. What I found was not much help to me.

When I can select the type from FLOW to DELEGATION, the component exchange is hidden.

Is there a simple example that can help me understand CE Delegation?

The reason I ask about I am looking CE with Delegation is as follows:

I am in the Logical Analysis stage. I am modeling a wafer processing system with 10-15 steps (A, B, C, …). Between each step, the wafer goes into the wafer carrier (X) like so:

A → X → B → X → C → X → D → X → …

I would like to draw an architecture or scenario diagram that hides the X part:

A-> B-> C → D-> …

I was wondering if CE with Delegation may help me accomplish that.

Is there another recommended approach?

Thanks!